[[die_erste_schaltung]]

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Next revision
Previous revision
Last revision Both sides next revision
die_erste_schaltung [2010/09/19 22:14]
beckmanf created
die_erste_schaltung [2010/11/15 16:55]
magg initialisierung entfernt
Line 21: Line 21:
   component first    component first 
   port (   port (
-    SW:         ​in ​std_logic_vector(9 downto 0); +    SW:         ​in ​std_ulogic_vector(9 downto 0); 
-    LEDR:       ​out ​std_logic_vector(9 downto 0)+    LEDR:       ​out ​std_ulogic_vector(9 downto 0)
     );     );
   end component;   end component;
  
 -- Signal declaration for the switches and the leds -- Signal declaration for the switches and the leds
-  signal switch, ledr : std_logic_vector(9 downto 0) := "​0000000000"​+  signal switch, ledr : std_ulogic_vector(9 downto 0); 
  
 begin begin
Line 55: Line 55:
  
 <code vhdl first.vhd>​ <code vhdl first.vhd>​
-LIBRARY ​ieee; +library ​ieee; 
-USE ieee.std_logic_1164.all;​+use ieee.std_logic_1164.all;​
  
 -- Simple module that connects the SW switches to the LEDR lights -- Simple module that connects the SW switches to the LEDR lights
-ENTITY ​first IS  +entity ​first is  
-PORT ( SW   : ​IN      STD_LOGIC_VECTOR(9 DOWNTO ​0); +port ( SW   : ​in      std_ulogic_vector(9 downto ​0); 
-       LEDR : OUT     ​STD_LOGIC_VECTOR(9 DOWNTO ​0));  -- red LEDs +       LEDR : out     ​std_ulogic_vector(9 downto ​0));  -- red LEDs 
-END first;+end first;
  
-ARCHITECTURE Structure OF first IS +architecture structure of first is 
-BEGIN+begin
   LEDR <= SW;   LEDR <= SW;
-END Structure;+end structure;
  
 </​code>​ </​code>​
  • die_erste_schaltung.txt
  • Last modified: 2014/03/27 14:14
  • by beckmanf